As the use of integrated circuits becomes evermore commonplace, the popularity of CMOS Integrated Circuits has risen commensurately. Many CMOS Integrated Circuits are formed by creating a p-tub or p-well in a portion of a silicon substrate and creating an n-tub or n-well in the remainder of the silicon substrate. Some popular processes utilize fairly thick oxides to mask one tub (for example the already-formed p-tub) while the other tub (for example, the n-tub) is being formed. After both tubs have been formed, the thick oxide is removed. Unfortunately, the thickness of the oxide creates a height difference between the n-tub and the p-tub. The height difference contributes to an undesirably rough topography in the finished integrated circuits. Furthermore, the height difference also creates depth of focus problems for subsequent lithography steps.
Circuit designers have continually searched for methods to reduce the height difference between the n-tub and p-tub so that the deficiencies mentioned above may be alleviated.